opentdoors
Newbie level 6
8051 kernel
Hello everyones !
I'm a new member on this forum. I come from Vietnam as a electronics engineer.
I've tried to design a RTOS kernels on 89c52 with 8KB ext RAM. It just the way to learn Real-time Linux.
My evalution board consist a 89c52 with 8K RAM (6264) at 0x8000. There are 16 task in my design, each task has a 256 bytes external memory. Example:
-Task 0 with ext mem from 0x8000 to 0x80FF
-Task 1 ---------------------- 0x8100 to 0x81FF
...
-Task 15----------------------0x8F00 to 0x8FFF
So that DPH= task_id OR 80, DPL=0x00 to 0xFF.
Each task has a byte counter. When a Timer interrupt occured, counter of task is decremented one, and if counter of task reach to zero then this task is ready state.
Counter array is placed in internal RAM, ponted by R0. When a task is in running, it will call a Ondelay to reset its counter.
There are two other arrays in internal RAM, semaphore (just binary semaphore) array and event array. When a task is in wait state a semaphore, 8051 CPU also in idle mode until a timer interrupt occured. And when a task is in a wait state a event, it's alway switched to sheduler routine.
Sheduler is a routine based on counter array to change task's id in two variable: running_id and blocke_id, then it call context_switching to save internal stack of blocked task to external memory of that task, and restore stack content for next task. New task will be in running state after "reti ".
Sorry, in next time I'm going to post some source codes written in 8051 asm.
Thanks
Hello everyones !
I'm a new member on this forum. I come from Vietnam as a electronics engineer.
I've tried to design a RTOS kernels on 89c52 with 8KB ext RAM. It just the way to learn Real-time Linux.
My evalution board consist a 89c52 with 8K RAM (6264) at 0x8000. There are 16 task in my design, each task has a 256 bytes external memory. Example:
-Task 0 with ext mem from 0x8000 to 0x80FF
-Task 1 ---------------------- 0x8100 to 0x81FF
...
-Task 15----------------------0x8F00 to 0x8FFF
So that DPH= task_id OR 80, DPL=0x00 to 0xFF.
Each task has a byte counter. When a Timer interrupt occured, counter of task is decremented one, and if counter of task reach to zero then this task is ready state.
Counter array is placed in internal RAM, ponted by R0. When a task is in running, it will call a Ondelay to reset its counter.
There are two other arrays in internal RAM, semaphore (just binary semaphore) array and event array. When a task is in wait state a semaphore, 8051 CPU also in idle mode until a timer interrupt occured. And when a task is in a wait state a event, it's alway switched to sheduler routine.
Sheduler is a routine based on counter array to change task's id in two variable: running_id and blocke_id, then it call context_switching to save internal stack of blocked task to external memory of that task, and restore stack content for next task. New task will be in running state after "reti ".
Sorry, in next time I'm going to post some source codes written in 8051 asm.
Thanks