tri-sate buffer (74126)

[vinodquilon]

I am using 74126 as tri-sate buffer to drive a D Flip Flop clock input.
That is positive edge triggering of FF is controlled by buffer.
But the problem is that when buffer is in high impedance state, output should be Logic 0.
Does there need any 1K pull-down resistors to ensure Logic 0 state ?

 

[IanP]

The value of pull-down resistor depends on the type of gate that follows the tri-state 74126 ..
For example, the amount of I[OL] current in a "standard TTL " is 1.6 mA ..
The biggest pull-down resistor you could use would be 0.8V/1.6 mA or 500 ohms ..
A larger resistor would allow the input to exist in the no-mans land between 0.8V and 2.0V ..
In case of the TTL-LS family the I[ol] current is lower, somewhere around 0.4mA, so the pull-down resistor can be 0.8V/0.4mA= 2k ..

And so on ..

Once you have a pull-down resistor in place, what happens when the level has to rise to the logic “1” ? Have you consider that?

Rgds,
IanP

 

[vinodquilon]

The value of pull-down resistor depends on the type of gate that follows the tri-state 74126 ..
For example, the amount of I[OL] current in a "standard TTL " is 1.6 mA ..
The biggest pull-down resistor you could use would be 0.8V/1.6 mA or 500 ohms ..
A larger resistor would allow the input to exist in the no-mans land between 0.8V and 2.0V ..
In case of the TTL-LS family the I[ol] current is lower, somewhere around 0.4mA, so the pull-down resistor can be 0.8V/0.4mA= 2k ..

And so on ..

Once you have a pull-down resistor in place, what happens when the level has to rise to the logic “1” ? Have you consider that?

Rgds,
IanP

See my application linked here.

To solve all these issues I will replace 74126 with 7408 AND gate.
One input of all AND gates will be from IC9 NE555.
Other input follows from NOT gates.
Now there is no problems of high impedance states. Thus positive edge
triggering for D Flip Flops.

 

[IanP]

See my application linked here.

:?:

 

[vinodquilon]

See my application linked here.

:?:

 

[IanP]

Now everything is clear ..

You can easily connect 10k pull-down resistors to the CLK input of the 74AC74 (or HCT-series), they are CMOS ICs and their I[0L] current is in the uA region .. see attached table ..

Rgds,
IanP