Transition violations when setup and hold is fixed

[aditya1579]

A question asked to me in interviews often is:

If all the setup and hold violations are fixed in a design, but some transition violations are still there, would it be disadvantageous in some way ? Will there be a problem of some kind ?

Aditya

 

[yadavvlsi]

Check below thread:
https://www.edaboard.com/threads/256702/

 

[dbr@vo]

It will depend upon the magnitude of your tran violations, if magnitude is above the library limits definitely it needs to be fixed, as your library is not characterized for such a transition, and the delay value calculated by tool corresponding to such transition may be inaccurate. So, actually you might be violating setup but shown non violated by the tool because of the inaccuracy.
It will also depend upon the setup margin you are having on the tran violating path.