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transistor level simulation

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DeepIC

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Is transistor level simulation is a must for digital IC chip?
 

What do you mean by digital IC chip?
If i am right, most digital design ends when you are done with synthesis. You'll have your gate level netlist and runs functional as well as timing analysis with it. Then, you pass the netlist to P & R engineer. Most probably you would have iterations.
Transistor level simulation would be only occurred if you have timing or power problem.
 

what do u mean by a digital IC chip. if u are designing a chip on transistor level then yes. if u just want the functionality then use standard IC's available. if u don't get the exact functionalty then u might need a transistor scale simlation and design
 

I don't think it is a good idea if going for transistor level simulation on a ASIC design....
There are more things that you have to pay attention to, such as race, , constraint, timing violation, DFT(design for test)...
 

It is not good idea to make simulation of IC on transistor level. First you don't have proper models - no vendor give you such information. Than you can meet some divergence problems, and finally you are not sure if you model really everything.
 

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