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Hello all,


I have copied an simple inverter with verilogA here is the code and I added the white noise line only:


r/chipdesign - code for invertercode for inverter

with the PNoise agrees with white Noise I have put in my code but the transient Noise is totally off


r/chipdesign - Transient nosie setup

Transient nosie setup

my clock is 48.0MHz, I let it run for 1ms, transient conservative, noise fmax = 80.0G, I runned 5 transient noise with different seed



PN(clip(VT("/test") 100n 0.999m) "rising" 0.5 ?Tnom 20.833n ?windowName "Blackman" ?smooth 1 ?windowSize 8192 ?detrending "Linear" ?cohGain 1 ?methodType "absJitter")

I tried also with the window size 2497166, but the transient noise was something crazy


[ATTACH=full]198068[/ATTACH]


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