Anuja Diggikar
Junior Member level 1
Hi,
I created adaptive filter with xilinx 9.1i. The VHDL was created fine as well as synthsized ok. However, when I simulate the design, I expect to see a sine wave at the output, but I don't.
I see output values however, but the it is not in an analog format.
Does anyone know how to display the signal ?
Thank you
I created adaptive filter with xilinx 9.1i. The VHDL was created fine as well as synthsized ok. However, when I simulate the design, I expect to see a sine wave at the output, but I don't.
I see output values however, but the it is not in an analog format.
Does anyone know how to display the signal ?
Thank you