Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

timing closure and physical implementation comparation?

Status
Not open for further replies.

machos2

Newbie level 3
Newbie level 3
Joined
Mar 5, 2004
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
20
Anyone have experience on the performance comparation of timing closure, physical implementation flow:

1, JupiterXT floor plan + physical compiler placement + Astro route

2, netlist -> Jupiter floor plan + Astro timing driven plance and route

3, netlist -> SOC encounter floor plan, timing driven place, nanoroute

I tried a small block 270um X 270um register dominate block. physical compiler, JupiterXT/Astro took a lot of time to fix the negate slack. While encounter is much fast and got timing closure. Did I miss some thing in encounter or encounter is just better?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top