thickness of gate oxide

[srp]

what is the impact on the device performance as the thickness of gate oxide increases or decreases.

Thanks!

 

[deh_fuhrer]

Gate Oxide Thick : VT Increases
Gate Oxide Thin : VT Decreases

 

[sameer_dlh25]

Thickness increases -> Higher Vt , less static power consumption, slower cell
Thickness reduced -> lesser Vt , higher static power consumption, fast cell.

 

[master_picengineer]

Any material or documents discussing in details this ?
Please share.

 

[roadbuster]

Any material or documents discussing in details this ?

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The two important equations are:

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If the gate oxide thickness is reduced, then the gate area capacitance willl rise (\[C_{ox} \hspace{4mm} = \hspace{4mm} \frac{\epsilon_{ox}}{t_{ox}}\]). If \[C_{ox}\] rises, then the two \[\frac{1}{C_{ox}}\] terms will fall.

The only problem is that one of the \[\frac{1}{C_{ox}}\] terms is positive, and one is negative, and I can't prove which is dominant.

 

[deh_fuhrer]

Qf is the charge term due to surface defects.... So the second one is dominating in normal conditions..