The Transient Analysis of the OPA in Pipeline ADC

[wjxcom]

Hi all: I'm designing a 10 bits 50MHz/s Pipeline ADC, and design a good OPA is difficult for me!

Now I have designed a gainboosted opa, after the Transient Analysis, I found that the settling time is about 46ns, it's too long!

But at the same time I found that at 8.5346ns, this OPA has already reach 0.99989V.

I don't know if this opa is suitble for PipelineADC!
I don't know if the voltage 0.99989V is suitble for PipelineADC!

Help me please, thanx!!

 

[wjxcom]

No reply? or I do not express my question clearly?

 

[prcken]

the period of 50MHz/s sampling rate is 20ns, in order to insure the signal settles to a stable value within half of the period, i think the amplifier should have a settling time of less than 10ns to achieve certain accuracy. so the settling time of 46ns is too long.
your OPA has already reached 0.99989V at 8.5346ns but still ringing, you have to wait untill it finally reaches to the desired value within acceptable error.
in a word, the settling time should be reduced further.