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The reason of Verilog signed math calculation error

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EDA_hg81

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I am using Microchip Libero SOC to process the incoming data using Verilog.

But I found out the Verilog signed math operation is not correct, such as "01a114" + "ff6a1d" should = 010b31, but the result is "000b31"

Please let me know how to fix this problem.

Many thanks in advance.

Screenshot 2023-09-17 094357.png
 

What prevents you from posting the code? I'm sure there will be an indication of why only the 2 least significant bytes are being considered.
 

I am using Microchip Libero SOC to process the incoming data using Verilog.

But I found out the Verilog signed math operation is not correct, such as "01a114" + "ff6a1d" should = 010b31, but the result is "000b31"

Please let me know how to fix this problem.

Many thanks in advance.

View attachment 184986
why the waveform is 32 bits as 01a11400 not 01a114
 

I found out the solution to fix above problem is to break math into steps instead of putting all equation into one line.
 

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