The process corner questions

[John Xu]

process corner

My questions is about process corners in analog design. If I designed a circuit and sent to foundry for fabrication,e.g., 200 dies in a wafer. Because the process distributions, the chip is not always in their typical corner.My questions is,if one of the die is in wcs coner, is that means all the dies are in wcs corners? Is any possibilities, the dies in a wafer will represent differient corners, i.e., some in wcs, some in typ, some in bcs corner?

Another question is, if we have twenty wafers, is all wafers have the same corners?

Thanks in advance

 

[sharas]

process corner types

not all the dies will be in the same corner. For example, if there was a temperature gradient over the wafer, it will have a different impact on different wafers. The manufacturing process has alot of variables which may not be completely uniform across the wafer.

 

[cretu]

process corners

My questions is about process corners in analog design. If I designed a circuit and sent to foundry for fabrication,e.g., 200 dies in a wafer. Because the process distributions, the chip is not always in their typical corner.My questions is,if one of the die is in wcs coner, is that means all the dies are in wcs corners? Is any possibilities, the dies in a wafer will represent differient corners, i.e., some in wcs, some in typ, some in bcs corner?

Another question is, if we have twenty wafers, is all wafers have the same corners?

Thanks in advance

From what I've seen so far, a normal outcome would be to have the majority of the diesfrom one wafer or the wafers from one lot in the same process corner. The best case is when this is the typical corner. If it's not, you have to talk to the foundry to adjust the process( if you can)

But in general is highly unlikely that you will have an equal distribution of bestcase, worstcase and nominal case on the same wafer, or lot of wafers

 

[alok_ky]

process corners lots

same corner comes probably, for same lot.
To get better/uniformly distributed data, take samples from multiple lots

 

[Humungus]

That is why in analog, corner simulations don't make much sense unless you do it properly. It is much better that you make MC simulations considering LOT and DEV distributions.

Just consider this case for a technology with three corners per divice type:

5 types of PMOS (15 corners)
5 types of NMOS (15 corners)
4 types of resistor (12 corners)
4 types of diodes (12 corners)
4 types of capacitors (12 corners)

Total quantity of possible corners (unless you have correlation data) ~390.000 possible corners!!!!

MC simulations gives you a much accurate idea if your design will work under any LOT variation. DEV distributions account for matching among devices.