Max voltages are declared based on foundry reliability
testing. There will be voltage and current constraints
(multiple, probably) on each device / feature. These
will have been developed before you are allowed to use
the technology, although they may be more conservative
/ less nuanced than you might like.
On an individual design, test-to-fail will find you the
short time limit, and slightly-over-the-top stress applied
at voltage & temperature worst case corner for some
period (1K, 2K, 4K... hours) serves as proof of reliability
(or, failure analysis provides insight to new limiting
factors... maybe too late).
You don't measure the limit values per se. You measure
what you care about, having challenged and violated
those aspects in an orderly way, and you set the fence
short of where things go bad.
Input power is often really an input voltage limit if the
termination is off-chip.