Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I was trying to simulate varaible DC power supply but The output of Regulator is decreasing gradually from 11.9 (Vin) to 1.6 (Vout) Why it's happening??
You are missing the resistor that sets the output voltage. There should be potential divider formed across Vout and GND with the ADJ pin at its center.
Add a resistor between Vout and ADJ and take note of the minimum load current requirement. Typically it shouldn't be more than about 270 Ohms.
Also note that if the simulation is accurate, the diodes will be overloaded at power-up and at quite a low DC output currents.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.