cupoftea
Advanced Member level 6
Hi
Please compare the following five methods of CCM Boost PFC..(in efficiency and solution size)
1…Standard Boost PFC with mains diode bridge
2…Standard Boost PFC with Sync FET on the boost diode, and mains diode bridge
3….As (2), but with FETs across the bridge diodes, switched at 100Hz to reduce the bridge diode loss.
4..Bridgeless PFC with Synchronous FETs and 100Hz FETs.
5…Dual interleaved Boost PFC with Mains diode bridge. (UCC28070A dual boost controller)
We all know standard Boost PFC with Full Wave Mains rectifier front end.
We now have “Bridgeless PFC”. AYK, this is basically two interleaved Synchronous Boost converters, with the inductor moved upstream. -There is also another semiconductor (switched at 100Hz) , either diode or FET, downstream of the sync Boost FETs.
So yes, we reduce power loss by the amount wasted in a single mains diode, and that wasted in the Boost diode….the thing is, we could put a sync FET in parallel with the Boost diode anyway….so really, we are benefitting by the loss in a single mains rectifier only.
Now, slow silicon mains rectifiers have very low Vf anyway…and their Vf reduces with temperature…so have we really benefitted by all that much? I woudlnt mind betting that a “Bridgeless PFC” with all of its control, and synchronous FETs, 100Hz FETs, plus the extra common mode choking needed for its “common mode issue”, means that the “Bridgeless PFC” takes up more room than the standard PFC?
And why on earth have we completely skipped over the half-way house between “Bridgless PFC” and “standard Boost PFC”…that is…. “Standard Boost PFC with synchronous diode”?
I wouldnt mind betting that the smallest solution of all, is the “Standard Boost PFC with synchronous diode”….would you agree?
And also, what about “Standard Boost PFC with synchronous diode” with a mains diode bridge, with FETs switched at 100Hz across the mains diodes………………….this last one, is, would you agree, very likely to be the most efficient, and smallest solution of all of them?
Why have (2) and (3) above been completed and utterly ignored by the power electronics fraternity?
Also, "Dual interleaved Boost PFC with mains diode bridge" likely gives “Bridgeless PFC” a run for its money?....RMS conduction losses well reduced from the single stage solution.
I am concerned that “Bridgeless PFC” has become a marketing department darling, without having the advantages it purports too have. Silicon investment had to concentrate somewhere, so they chose “Bridgeless PFC”, when all told, its no great shakes?
Mains Diode Bridge:
The “Bridgeless PFC” relies for its hero_worship on villification of the losses in the mains diode bridge with silicon diodes…..but Si diodes have low Vf and the Vf reduces with temperature. Even then, Si diodes can be paralleled with controlled FETs very simply switched at 100Hz.
I mean, take apart any 1Kw SMPS that you like, and you will notice that the heatsink on the mains diode bridge is way smaller than the heatsinking of the PFC and PWM stage semiconductors….also, its likely to be so far away from the fan that no actual blown air moves over it…….and this!...this is the reason that we are going “Bridgeless PFC” ???
The last 750W offline SMPS I took apart (and had very low failure rate…never involving the diode bridge BTW) had the mains diode bridge on a very small heatsink….which actually sat on top of the mains input filter, so it actually didn’t take up any room at all..The diode bridge heatsink was at least 10x smaller than the other heatsinks....and it was as far away from the fans as could be....didnt even have fan air blowing over it at all.
_________-----______
Bridgeless PFC component count:
The most efficienct rendition of the Bridgeless PFC has Eight Semiconductors.......Two (HF) Sic FETs each with a parallel Sic Diode....Two slow Si FETs (100Hz switched), each with a parallel slow diode. Is it really worth it?
A standard Dual Boost PFC has only five semiconductors....2 FETs, 2 Sic diodes and one Mains diode bridge.
So would you agree, “Bridgeless PFC = Marketing nonsense”?
Please compare the following five methods of CCM Boost PFC..(in efficiency and solution size)
1…Standard Boost PFC with mains diode bridge
2…Standard Boost PFC with Sync FET on the boost diode, and mains diode bridge
3….As (2), but with FETs across the bridge diodes, switched at 100Hz to reduce the bridge diode loss.
4..Bridgeless PFC with Synchronous FETs and 100Hz FETs.
5…Dual interleaved Boost PFC with Mains diode bridge. (UCC28070A dual boost controller)
We all know standard Boost PFC with Full Wave Mains rectifier front end.
We now have “Bridgeless PFC”. AYK, this is basically two interleaved Synchronous Boost converters, with the inductor moved upstream. -There is also another semiconductor (switched at 100Hz) , either diode or FET, downstream of the sync Boost FETs.
So yes, we reduce power loss by the amount wasted in a single mains diode, and that wasted in the Boost diode….the thing is, we could put a sync FET in parallel with the Boost diode anyway….so really, we are benefitting by the loss in a single mains rectifier only.
Now, slow silicon mains rectifiers have very low Vf anyway…and their Vf reduces with temperature…so have we really benefitted by all that much? I woudlnt mind betting that a “Bridgeless PFC” with all of its control, and synchronous FETs, 100Hz FETs, plus the extra common mode choking needed for its “common mode issue”, means that the “Bridgeless PFC” takes up more room than the standard PFC?
And why on earth have we completely skipped over the half-way house between “Bridgless PFC” and “standard Boost PFC”…that is…. “Standard Boost PFC with synchronous diode”?
I wouldnt mind betting that the smallest solution of all, is the “Standard Boost PFC with synchronous diode”….would you agree?
And also, what about “Standard Boost PFC with synchronous diode” with a mains diode bridge, with FETs switched at 100Hz across the mains diodes………………….this last one, is, would you agree, very likely to be the most efficient, and smallest solution of all of them?
Why have (2) and (3) above been completed and utterly ignored by the power electronics fraternity?
Also, "Dual interleaved Boost PFC with mains diode bridge" likely gives “Bridgeless PFC” a run for its money?....RMS conduction losses well reduced from the single stage solution.
I am concerned that “Bridgeless PFC” has become a marketing department darling, without having the advantages it purports too have. Silicon investment had to concentrate somewhere, so they chose “Bridgeless PFC”, when all told, its no great shakes?
Mains Diode Bridge:
The “Bridgeless PFC” relies for its hero_worship on villification of the losses in the mains diode bridge with silicon diodes…..but Si diodes have low Vf and the Vf reduces with temperature. Even then, Si diodes can be paralleled with controlled FETs very simply switched at 100Hz.
I mean, take apart any 1Kw SMPS that you like, and you will notice that the heatsink on the mains diode bridge is way smaller than the heatsinking of the PFC and PWM stage semiconductors….also, its likely to be so far away from the fan that no actual blown air moves over it…….and this!...this is the reason that we are going “Bridgeless PFC” ???
The last 750W offline SMPS I took apart (and had very low failure rate…never involving the diode bridge BTW) had the mains diode bridge on a very small heatsink….which actually sat on top of the mains input filter, so it actually didn’t take up any room at all..The diode bridge heatsink was at least 10x smaller than the other heatsinks....and it was as far away from the fans as could be....didnt even have fan air blowing over it at all.
_________-----______
Bridgeless PFC component count:
The most efficienct rendition of the Bridgeless PFC has Eight Semiconductors.......Two (HF) Sic FETs each with a parallel Sic Diode....Two slow Si FETs (100Hz switched), each with a parallel slow diode. Is it really worth it?
A standard Dual Boost PFC has only five semiconductors....2 FETs, 2 Sic diodes and one Mains diode bridge.
So would you agree, “Bridgeless PFC = Marketing nonsense”?
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