The margin for Cadence corner setup in which tests are done for 65nm tech

[AdvaRes]

Hi all,

I need a tutorial regarding the circuits characterisation/simulation using Cadence tools. I need to know the margine (of temperature, voltage, ...etc) in which test are done for the 65 nm technology.

Please help.

 

[keoiuser]

cadence corner simulation

For corner simulation we use power supply with ± 10% for example if you have a VDD=1.2V you must simulate your circuit at 1.08 & 1.32 V, same thing for temperature : 125 & -40 °C instead of 27°C.

 

[AdvaRes]

cadence corner

You mean if I have to simulate the circuit in these conditions:

T= 125 Deg V=1.32 V
T= 125 Deg V=1.08 V
T= -40 Deg V=1.32 V
T= -40 Deg V=1.08 V

If the simulation is ok I can say that the circuit is functional. Am I rigth ?
Or I have to do other simulation with other conditions/parameters ?

Please if you have any material discussing this issue share it.
I'll donate 10 pts for real help.

Thanks in advance.

 

[jody]

corner simulation in eldo

i do same simulations of temperature using the spice algorithm in eldo "Mentor Graphics". are you interested?

 

[AdvaRes]

corner setup in cadence

I'm Interrested in all simulations with Eldo and Eldo RF.
I' need a sted by step tutorial. Please refert me to the best documentations.
Thanks.

 

[peterwang]

Re: Cadence Corner Setup

You can find a detail example for corner set-up at :

**broken link removed**

In this free design, you can download the whole circuit simulation set-up and learn how to run corner simulation in Cadence.

 

[lily1981216]

Re: Cadence Corner Setup

I can't log in the website.