the lef file used in soc encounter

[pathto_teraze]

Hi,

I am totally new to soc encounter.
I want to import a design to encounter, a lef file is required.
There are several lef files in my design kit and I don't know which is the right one.
Can anybody sent me a sample of a lef file?

Another question is: Can the lef file be used both by cadence and synopsys?

Thank you very much!
Looking forward to your reply.

Teraze

 

[gliss]

There are only a few different types of LEFs. I don't know what PDK you're using or what exactly you plan to do with these LEFs. I'm assuming you want to create a LEF for your existing design. There are automated tools for this but if you want to do it manually, look for a design LEF that has 1 or more cell definitions. It stars with some LEF header info, a MACRO keyword, PIN definitions, SIZE, orientation, obstruction, etc. Do you need the LEF syntax reference?

 

[pathto_teraze]

There are only a few different types of LEFs. I don't know what PDK you're using or what exactly you plan to do with these LEFs. I'm assuming you want to create a LEF for your existing design. There are automated tools for this but if you want to do it manually, look for a design LEF that has 1 or more cell definitions. It stars with some LEF header info, a MACRO keyword, PIN definitions, SIZE, orientation, obstruction, etc. Do you need the LEF syntax reference?

Yes, please. I don't know anything about the lef file.
Actually, I want the lef file for the standard cell that I have written in my Verilog file.
I assume this lef file is used for mapping, I am not sure...

 

[gliss]

The lef file is used to place & route standard cells, macros or any design that has physical represtation usually. Usually when LEFs are generated they are based on designs layouts. You need the physical information from something like a layout in order to generate accurate LEF. Whoever delivered your standard cell library should also have provided a corresponding LEF library.

 

[gen0357]

For digital design two types of LEF file.

For standard cell library
std_cell_ tech.lef : Defines the technology information.
std_cell.lef : Defines the std. cell macro definition.

Similarly for IO library.
IO_lib.lef : Defines the IO macro definition.

The sequence for importing in SOC encounter is : first specify the tech.lef and than the remaining LEF.

 

[kumar_eee]

For digital design two types of LEF file.

For standard cell library
std_cell_ tech.lef : Defines the technology information.
std_cell.lef : Defines the std. cell macro definition.

Similarly for IO library.
IO_lib.lef : Defines the IO macro definition.

The sequence for importing in SOC encounter is : first specify the tech.lef and than the remaining LEF.

If your design contains any HardMacro or Memory instances, then you need to add those LEF's as well.