When I did the noise simulation, I found my amplifier input reference noise is around 10V (integrated from 0.001~0.01Hz) to my amplifier input node, all component is real PDK model, but my VDD is only 2.5V, and the input DC bias voltage is 1.25V; what will happen for this noise? Does it influence my input DC bias at the 10V level? I want to know what influence it will have on my circuit and did it shift my DC input bias at around 10V?
My amplifier Cs and Cf are very small, in the 1fF range. Is this one possible? Or I just use the noise in Virtuoso ADE to simulate it so if it's the simulation problem? (or is it reasonable to see the 0.01Hz~0.1Hz integration to see the DC noise?) Thanks!