The best way to implement matrix multiplication ?

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bercam

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Working with Matrix

What is the best way to implement matrix multiplication and reverse matrix?

VHDL, IP_Cores ...

Now I'm using Altera QuartusII 4.0.

Thanks in advance
 

Re: Working with Matrix

Anyone know an IP core to make matrix multiply?

In order to implementation, is better make HDL description?

Thanks
 

Re: Working with Matrix

What kind of matrix? Bit per bit, or integer (like 8 bits)?

Doing matrix multiply on small matrix shouldn't be too hard, ex: 4x4 matrix. Keep in mind though as the number of routing resources grows dramatically as the size of the matrix increase.

Though, you could do greater matrixes in multiple clock cycles, for example, multiplying one line with one column, at every clock cycle. This could save on resources, but requireing m x n clock cycles (where m and n are the matrixes columns and row count).
 

Re: Working with Matrix

Matrix multiplication is done through a multiply and accumulate (MAC) unit, and a memory that's all what u need you may even exclude the memory , I talking here about integer multiplication


that's all folks
 

Re: Working with Matrix

Yes Big boy, I mean matrix of integer numbers (16bit) used to implement DSP algorithms. Adaptative Filter explicity.

I'll need about 100 x 100 matrix multiply. The question is :

What is the right way to implement this under ALTERA Quartus II 4.0?

HDL? Megafunctions?

As Big boy tells I'm thinking to segment matrix in parts as the maximum number of MACS than my FPGA can be implemented.

Any suggestion will be appreciated for me.

Thanks in advance.
 

Re: Working with Matrix

In my opinion, I would not began to use IP functions, unless lowest level
( multiplier, adder), and would make all on HDL.
Also look in applications notes, there it is full of the helpful information. I work with Xilinx and consequently I can not give concrete the reference to the information, but for example at Xilinx there is document XAPP284 " 3 x 3 Matrix Multiplier for 3D Graphics and Video ". I think you will find in it something useful to myself.
 

Re: Working with Matrix

Usually, doing matrix operations in hardware is better suited for really small matrices.

Here, your matrices are 100x100. I guess that both are 100x100 ?

This meen 20000 elements of 16-bits. For the multiplication, you should use FPGA that have hardware multiplier.

Each 'cells' of your resulting matrix will be the the results of 100 multiplications, and 100 additions.

Not really sure how this could be optimized for FPGA...
 

Re: Working with Matrix

I would refer to VHDL code style to do matrix/vector multiply.

I'm thinking to make in a loop for within a process in order to do recursive MACS.

Anybody can give more inspiration?

Thanks
 

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