hdang
Member level 1
redhawk
Let's say I need to design a macro that is about 10k-20k transistors in mixed signal design. What is the best solution (in term of the best timing vs accuracy) for power analysis in the following conditions:
+ Using PrimePower: If I have RTL for the digital parts and its standard cell library power information. But, there is not any power information for the analog cells.
+ Using Nanosim: Same condition as above but my design using SOI process (spice model level=57). Does nanosim support it?
+ Using Hspice:
+ Simulate the whole macro using StarSimXT.
Thanks in advance,
Let's say I need to design a macro that is about 10k-20k transistors in mixed signal design. What is the best solution (in term of the best timing vs accuracy) for power analysis in the following conditions:
+ Using PrimePower: If I have RTL for the digital parts and its standard cell library power information. But, there is not any power information for the analog cells.
+ Using Nanosim: Same condition as above but my design using SOI process (spice model level=57). Does nanosim support it?
+ Using Hspice:
+ Simulate the whole macro using StarSimXT.
Thanks in advance,