Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

THD after applying Vpulse on 3-level d.c.i on pspice

Status
Not open for further replies.

time_search

Junior Member level 3
Junior Member level 3
Joined
Feb 22, 2010
Messages
25
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
jordan
Activity points
1,454
good day...i have constructed the 3-level diode clamped inverter on Pspice and i got the THD of it...then when i put the Vpulse i have the THD increased 1%!!!!!...is that ok...i think it shouldnt increase ...actually i think it should decrease...so is it the location of Vplulse is not ok or the parameters of it?...knowing i used: v1=0,v2=5,Td=0,Tr=10u,Tf=10u,Pw=0.07m,Per=0.14m......any help?...thanx...
note: the THD i talked about was for the voltage, but actually for the current THD it is decreased after applying Vpulse cus it was 20% and became 18% after applying Vpulse for the same load(R=1K and L=1.837H) i mean P.F=30...
 

can you share your circuit? The difference of 1% could be due to numerical noise due to commuting limitation.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top