It looks like OSX has vim installed, or that you can get vim. You can probably get emacs as well. They both have suitable features for VHDL. Primarily, syntax highlighting, b-editing, and marker-based code folding. I haven't found any good intellitype solutions for VHDL/Verilog projects yet.
Syntax Highlighting has obvious benefits.
Block-editing is amazing because VHDL is a very verbose language with a very regular structure. If you take the small amount of time to keep things columnized, you end up being able to copy/paste/modify large blocks of code easily.
Marker-based code-folding is my personal favorite. It is an option in vim, and a plugin for emacs. It lets you add special strings like {{{ and }}} to define fold points in the design. I find that I often have one or two related processes, a process and an instance, or an instance and a few extra lines of assignments and that I want to treat these as a logical section of my code. I end up partitioning (all code lines are in a fold) my files. When I open a file, I basically get a table of contents and can quickly navigate the file.
Both editors do have learning curve though.