the test-charge injection circuit below is used to supply test-charge for a CSA (not drawn).
It is expected that this circuit sucks current out of the CSA input, i.e., injecting electrons.
As shown in the picture, there is some current come into the CSA.
Is there a way to reduce it?
Adding diode before the output node(In_node), between the Source of M12 and NA does not lead to the expected result.
Any other circuit recommendation is also welcomed.
You have sharp edges, so charge is injected everywhere. The question is what is dominant source (switches or cap itself).
If you need negative polarity, then you can check slide 13 of this document
You have sharp edges, so charge is injected everywhere. The question is what is dominant source (switches or cap itself).
If you need negative polarity, then you can check slide 13 of this document
First question is "are those spikes significant in any way?". They
appear large because the parasitics are minuscule and edges
abrupt. But the energy / charge involved, may be small or
insignificant if duration is. What sort of measurement error
do they amount to? Are you obsessing over a ghost sighting?
Blocking cap and voltage step is a good way to get charge
injected, if you are able to instrument it up. But so doing,
probably changes the circuit (FETs likely smaller C than probe).
You'd need to know dV on the C to get dQ, meaning voltage
on both sides. A simulated or resting voltage on the inboard side
could suffice if you're not after the highest accuracy I suppose.
Strobe signal is responsible to inject charge, by rapid change of voltage on the "left" capacitor terminal.
Injected charge is equal to product of Ctest and DC voltage level at cap input (here it is Vlow or Vhigh).
Shortening cap input to ground by switch (controlled by strobe signal) creates negative charge injection.
In this solution, you have not additional charge injection through the switches and amount of charge is controlled by DC voltage provided on capacitor input.