Terminating 100Mb LVDS

Hi all,

I am designing a 100Mb LVDS (EtherCAT) application for the first time, and I'm worried about terminating the signals properly on the PCB. The differential lines are coming in from a twinax cable, through a USB connector, and to the receiver chip.

Obviously I would like to make sure there are no impedance changes causing reflections, but how is this possible when I have to route a connector with one pitch to an IC of another pitch, via a resistor with another pitch?

Many thanks

You are over-dramatizing the impedance-matching problem. The layout would be good even for GHz speed. If you have longer
PCB traces, they should realize the right differential impeddance, but your design effectively has no traces.

FvM said:

You are over-dramatizing the impedance-matching problem. The layout would be good even for GHz speed. If you have longer
PCB traces, they should realize the right differential impeddance, but your design effectively has no traces.

Click to expand...

Hi FvM,

Thanks. Trouble is I'm not sure how much to dramatize the impedance problem. I've asked around and I'm getting confusing advice. Some people say that any impedance change can be bad, even if it's a mm long.

So, my signal would come off the wire and meet an impedance change before it reaches the terminating resistor.

Other trouble is I don't have a good enough scope to be able to generate an eye-diagram, so, once I've made the design, I can't really check to see how good it is, so I just want to be sure.

Thanks again

hugo

Impedance matching is necessary at 100 MBPS, but PCB structures below 5 or 10 mm length can be effectively ignored for it. It's
correct, that each transmission line discontinuity creates a reflection, but they must be analysed related to the signal rise time.
The rather small discontinuities in your circuit could be measured with a 100 ps risetime TDR instrument, but hardly with a 500 ps
or 1 ns risetime signal. The largest impedance mismatch in your receiver circuit is created by the chip input capacitance and pin
inductance anyway.