tell me the error in this program

hi folks

how r u all. hey i'm facing a problem as usual. pleas check a simple program which is given below


module led(HEX,LED);
input HEX;
output LED;
reg LED;

always @(HEX)
begin
case (HEX)
1'b0 : LED = 1'b1; //1
1'b1 : LED = 1'b0; //2
default : LED = 1'b0; //0
endcase
end

this program was compliled and synthesised using ISE 5.2/ this program compiles and synthesise without any error or warning. now here comes the problem when i give the constraints for pins for this file it successfully genrates the bit file as well as sucessfully the mcs file is genrated. when the mcs file is loaded to the fpga prom it doesnot executes. can anybody tell me y this is happeneing. what could be the error over here. what is the possible solution. i'm using spatranIIE XC2S300E fpga on the board supplied by MEMEC.

thanx in advance.


ashish

did you simulate this code?
i think you can not use output pin led with reg (led )with the same name.
change reg name and assigne the output(led) net to itssignal.

In your code, width of HEX is 1-bit. So LED is always be '1'. LED is never be '0'.

Dear Mc&fpga

if u want to get the output at the output port the the port muat be assigned either as a register or as a wire then only u would be able to get the output at the port.

regards
Ashish