jayanth.neo
Junior Member level 1
Hi,
There is a 3 stage equalizer on the receiver side operating at 5Gb/s. The gain of the individual stages and hence the total gain of the equalizer varies with temperature from -25 to 125 ( negative temp co). Each stage comprises of a Resistive loaded Diff pair( Resistors are used to ensure maximum bandwidth of operation,otherwise I would have tried a voltage controlled resistor using pmos devices, the resistors used have negative temp co).
I had plans of using positive and negative temp co resistors in parallel, or using voltage controlled resistors controlled by a bandgap but a simple analog control technique is what I am looking for that will give me reasonable result.
What kind of circuit technique can be used to compensate for the temperature dependency of the gain so that the gain is fairly constant over the temp range of -25 to 125.
The equalizer is a simple 3 stage equalizer, each stage being a resistive loaded diff pair. I can post the circuit schematic due to Ip rights issue.
Any suggestions from the bright analog minds are greatly appreciated.
There is a 3 stage equalizer on the receiver side operating at 5Gb/s. The gain of the individual stages and hence the total gain of the equalizer varies with temperature from -25 to 125 ( negative temp co). Each stage comprises of a Resistive loaded Diff pair( Resistors are used to ensure maximum bandwidth of operation,otherwise I would have tried a voltage controlled resistor using pmos devices, the resistors used have negative temp co).
I had plans of using positive and negative temp co resistors in parallel, or using voltage controlled resistors controlled by a bandgap but a simple analog control technique is what I am looking for that will give me reasonable result.
What kind of circuit technique can be used to compensate for the temperature dependency of the gain so that the gain is fairly constant over the temp range of -25 to 125.
The equalizer is a simple 3 stage equalizer, each stage being a resistive loaded diff pair. I can post the circuit schematic due to Ip rights issue.
Any suggestions from the bright analog minds are greatly appreciated.