sudeep_
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Hi,
How to get required standard cell from libraries in design vsion _2011.09 compiling process,
I like to get low transistor size(0.5u width) in standard cell, but i am getting (1u) transistor size standard cell.
Even i have used with different libraries like LPHVT, LPSVT is receiving same size of standard cells.
I am not applying any clock signal, output delay, load..etc, since i need only signale stage inverter with minimum size( only one PMOS, NMOS).
Help me in this case, Thank you
How to get required standard cell from libraries in design vsion _2011.09 compiling process,
I like to get low transistor size(0.5u width) in standard cell, but i am getting (1u) transistor size standard cell.
Even i have used with different libraries like LPHVT, LPSVT is receiving same size of standard cells.
I am not applying any clock signal, output delay, load..etc, since i need only signale stage inverter with minimum size( only one PMOS, NMOS).
Help me in this case, Thank you