syno*psys report warning question

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xiongdh

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DC report as followed:
write -format verilog -hierarchy -output top_syn.v
Warning: Verilog 'assign' or 'tran' statements are written out. (VO-4)


what does the "Warning" message mean?

thanks
 

The verillog netlist inculdes assign statement or tri state!
 

If you think that are not real design problem...
try this two setting

set_fix_multiple_port_nets -buffer_constants -all

set verilogout_no_tri true

please re-check manual to ensure the effect is what you want.
 

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