syno*psys report warning question

[xiongdh]

DC report as followed:
write -format verilog -hierarchy -output top_syn.v
Warning: Verilog 'assign' or 'tran' statements are written out. (VO-4)


what does the "Warning" message mean?

thanks

 

[cnz]

The verillog netlist inculdes assign statement or tri state!

 

[repac]

If you think that are not real design problem...
try this two setting

set_fix_multiple_port_nets -buffer_constants -all

set verilogout_no_tri true

please re-check manual to ensure the effect is what you want.