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If I understand correctly , This is one of the SOC methodolgy to shut down power to some of the hard macros like memories and you can shutdown power to functionality of subsys too .
partition of which domains need to be in separate power is depends on your architecture
ex: you can shut down power to onchip SRAM ( scratch pad) while processor is in standy ....
please let me know if you have specific queries ....
If I understand correctly , This is one of the SOC methodolgy to shut down power to some of the hard macros like memories and you can shutdown power to functionality of subsys too .
partition of which domains need to be in separate power is depends on your architecture
ex: you can shut down power to onchip SRAM ( scratch pad) while processor is in standy ....
please let me know if you have specific queries ....
Yeah, you are quite right, it means shut down some of the subsystem of your chip or product which has no operation currently to reduce the power consumption.
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