subthreshold mode current

[vpecxuwei]

subthreshold matching

I am designing an analog circuit in subthreshold mode. The bias current is only a few nA. I am very uncomfortable with such a small current. Can anyone tell me will such small current be a problem? how large current is subthreshold circuit usually designed?
ANother question is: in the cascoded stage, is it okay what some MOSFETs work at above threshold mode and some of them work at subthreshold mode?


Thank you,

 

[aryajur]

Your lower current limit should be decided by your noise level of the signal and the noise contribution of your transistors. So try keeping it above that. If your noise level is lower a few nA may be acceptable. Also it depends on ur design whether u want to put some transistors in Sub Threshold and some ove threshold. If that works for you then its good enough.

 

[chip]

you can read some papers about low voltage low power and some papers about characteristics of MOS working in subthreshold

 

[maxwellequ]

The operation in subthreshold was misunderstood (and ignored) for some time, but now it is well characterized. So, as long as the models you are using make a good job, there is no problem in working there.

Note also that there is nothing "mysterious" about the operation in subthreshold region: the transistor doesn't "know" that it is operating there and starts to make crazy things (also one transistor doesn't "know" that its neighbor is operating in another region, so you can mix them).

The only problem that happened in the past, was that there were no acceptable models for that region.

Rgds

PS: The regions of operation in a transistor are only arbitrary denominations we use. The transistor couldn't care less about our denominations.
We make that distinction because we can identify particular operating properties in each region: for example in subthreshold, the current depends exponentially of the VGS, while in strong inversion there is a quadratic dependence.

 

[vpecxuwei]

Thank you for your help.
I just came up with another question.

Is it better for transistor matching if I have the transistor pair work at above threshold mode instead of subthreshold mode with a longer L and shorter W.
And keep W(above)*L(above)=W(sub)*L(sub)

 

[sgperzoid]

a further suggestion is that you need to be very careful on the layout and process corner, temperature effect since the transistor will easily deviate from subthreshold region due to those effect