K4R1
Newbie level 6
Hello,
Routing some nmos20t in 0,35 HV, i got a very strange parameters mismatch between the layout and schematic, where there should be none. My LVS error report tells me that their is a mismatch of 20% which is completely impossible since the schematic transistor and layout transistor have the same parameter. I'm enclosing a screenshot to picture the problem, if anyone can help me please !!!
the twisted thing is that i have re-imported the layout of this MOS to make sure it has been correctly "translated" and i also already layouted a same mos before with no problem... But this time, it seems to not be happy.
K4R1
Routing some nmos20t in 0,35 HV, i got a very strange parameters mismatch between the layout and schematic, where there should be none. My LVS error report tells me that their is a mismatch of 20% which is completely impossible since the schematic transistor and layout transistor have the same parameter. I'm enclosing a screenshot to picture the problem, if anyone can help me please !!!
the twisted thing is that i have re-imported the layout of this MOS to make sure it has been correctly "translated" and i also already layouted a same mos before with no problem... But this time, it seems to not be happy.
K4R1