Storing values into a vector- returning an error.(VHDL)

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shiny1

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I am trying to store the value of Ram into Ram2 (using VHDL) ; if a change occurs on any bit value. Its giving the following error at the if loop.
Code: 
ERROR:HDLCompiler:989 - " Attribute event requires a static signal prefix
for i in 0 to 15 loop
if (Ram(i)' event and (Ram(i) = "0" or  Ram(i) = "1") )  then 
Ram2(i) <= Ram(i);
end if;
end loop;

Pls let me know if you have any suggestions or corrections

Thanks.
 

it's complaining about the Ram(i)'event.

This loop if it had even worked this code would only assign the bit that changes in Ram to Ram2 is that your intention?
 

Yeah.. every time one bit changes in Ram and I want to store all these changes in Ram2 for comparison purposes
 

Is Ram a std_logic_vector or an array?

If it's defined (or could be defined) as a std_logic_vector you could just compare Ram = Ram2 to determine if a bit changes. then assign Ram to Ram2 when that happens.

I'm not sure if you're trying to do this combinatorial or sequentially.
 
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    shiny1

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Thanks for the reply and am trying to do this combinatorial.

type RAMtype is array(15 downto 0) of std_logic_vector(0 downto 0);
signal Ram1,Ram2 : RAMtype;
 

this cannot synthesise to anything, so I assume this is some odd testbench?

otherwise, why not just write to both rams simultaneously?
 

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