Stacking of MOS devices

Status
Not open for further replies.
P

Prashanthanilm

Full Member level 5
Joined
Aug 24, 2012
Messages
302
Helped
36
Reputation
72
Reaction score
36
Trophy points
1,308
Visit site
Activity points
2,950
Hi All,

What is the pron and cons of stacking the pMOS and nMOS device?.
Eg:
Conisder an inverter design.

What will the the ouput when:
1.There are 5 pMOS and nMOS
2.There are 10 pMOS and nMOS
3.There are 15 pMOS and nMOS

All the pMOS and nMOS are in series.

Any help would be really appreciated

Thank you,
Prashanth
 

Stacking would give a cascoding type effect. This would give higher gains.
But the leakage currents of each transistor adds up and after a few levels of stacking you would not see any improvement.
 

a few levels of stacking you would not see any improvement.
Click to expand...

What is meant by this? whether it will be same as before?.

And whether it will function as inverter both Electrically and functionally??
 

I have not done this for an inverter. I have checked this for an analog common source amplifier type circuit. As you increase the stack, the output impedance increases as expected for a few levels and then stops increasing. This is when the substrate leakage current becomes comparable to the actual current in the circuit.

In an inverter I expect a similar behaviour.
 

Hi Nitish,

Thank you.

I believe that with 2 stack devices the leakage decreases.

But what if I go on increasing the stack.

In the case of inverter, will you tell that whether it will function as inverter with 10stack pMOS and nMOS?
 

Sorry dude, I cannot answer that. You can try it yourself and see what happens.
You would need a lot of voltage headroom to keep each transistor in the correct region of operation.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…