JPdP
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I would like to use the CE topology for an DRO Oscillator design but, I just doen't get the topology unstable. I've tried an inductor and later an capacitor in shunt with a resistor at the emitter to ground, to see if I can get K < 1 , |S11| and |S22| >1. I just can't get it to work.
Any tips/ideas would greatly be apresiated.
regards
Any tips/ideas would greatly be apresiated.
regards