Stable Biasing Circuit with Enable/Disable Function in CMOS

[wylee]

Does anyone knows how to design a biasing voltage reference circuit with enable/disable function in CMOS?

Normal stable biasing reference point are generated from a chain of equal size PMOS loads. How can we improved this with a enable/disable circuitary which is stable in process and temperature variations? :?:

 

[rambus_ddr]

Re: Stable Biasing Circuit with Enable/Disable Function in C

all PMOs current source serie with a pmos switch, then you can control the switch to select the current gain

 

[electronrancher]

that's not how it's done, but can be used sometimes.

real bias networks in IC's kill the gate voltage to shut off the bias network.

for a set of pmos mirrors, you'd add a pmos between vdd and the gate connections. now when you turn this pmos on, it pulls the gates of all your mirrors to vdd and shuts off your bias currents.

a similar trick for nmos mirrors, except now the shutdown transistor is nmos, and pulls the gates of your nmos mirrors to ground, shutting off the nmos currents.

hope this helps!

 

[Edward_2288]

well, what is the difference between the two techniques? seems like the same.

 

[electronrancher]

nope, not the same - you get glitches if you use a pmos pass device.

 

[Edward_2288]

so, in practice, the second method is used. well, thanks for the knowledge sharing.

 

[eekenneth]

Re: Stable Biasing Circuit with Enable/Disable Function in C

Why i get glitches if use pMOS ?
Though i practically use nMOS as the gate-off approach in my design as well