Stabilising a full-bridge smps by increasing capacitor ESR?

[grizedale]

Hello,

We are doing an offline, 260W , isolated, voltage mode , full-bridge smps. (Vout = +/-50V/2.6A)

We need a fast transient response, but we know that this will be difficult because of the output LC filter. (68uH and 940uF).

This has a severe 180 degree phase drop at the LC resonant frequency (630Hz).

...this in turn makes compensation very difficult.


However,

If we add a series resistor of 0R27 in series with the output capacitance, then the ESR zero frequency becomes 627 Hz.

........Thus we avoid the severe 180 degree phase shift of the output, and turn the power stage into a flyback type stage, which means a faster transient response is much easier to get. (Because there is less delay going through the power stage)


Do you think this is correct?

(The resistor will dissipate 0.6W at max load but this power supply is for audio and not often at max load.)

 

[mtwieg]

Yes it's a valid way to improve stability, but it will come at the cost of greatly increased output ripple. You'll probably end up having to add another small filter on the output, either an LC or another, smaller low ESR cap.

Also I don't see how you can say doing that makes it like a flyback stage... that has to do with it's method of energy transformer, not its response time.

 

[grizedale]

yes , i take your point about the flyback...but please allow me to explain further

.. in terms of this fact it is the same as flyback........

i.e. the control-to-output bode plot goes along at the DC gain, then it goes down at -20dB / decade..

....so in that way, it is now similar to a flyback bode plot.

(i.e. in that it goes flat from 0hz, then down at -20 instead of -40dB/decade

 

[mtwieg]

No, that's not necessarily the same as a flyback (and keep in mind a flyback doesn't always have just one pole, as you know). Adding the capacitor ESR does not remove a pole from the system, it just adds a zero. If the zero is placed near the rolloff point of the converter, then it will appear to eliminate it, and you'll get a similar transfer function to a single pole system. But, that may not the optimal frequency to place the zero at, if you want to maximize your crossover frequency. Putting it at a higher frequency will probably give a higher crossover frequency, and a lower output ripple voltage. The downside is that you will then have a "dip" in the phase response which could potentially cause your stability to be conditional. In practice this should be determined along with the design of the error amplifier compensation, to get the best overall result.

 

[grizedale]

Though i am sure that you agree that feedback compensation of this full bridge will be far easier if i add the resistor in series with the output cap to artificially increase ESR as described?

...doing this will also mean its easier to make the smps have higher bandwidth and still be stable.

Surely this is an obvious fact?