SRAM worst case read and write margin

Status
Not open for further replies.
Read margin is defined as the bit line differential when you turn on the sense amplifier. During a read operation the bit lines discharge....so the bit line with 0 data will discharge a differential is created between bitline and bitline_bar. Once it reaches a value where you have sufficient difference between the two , the sense amplifier is fired so that you have the right data (0 or 1). it depends on the quality of sense amplifier how much value it needs to correctly detect a 0 or 1.

Write margin is kind when you writing into the bit cell. This is compilcated to measure but usually write time is large as you have more time to write into the bit cell. but the same idea applies here too with respect to the bit cell internal latch nodes.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…