Spyglass usage opinions

[ivlsi]

Hi All,

Please share your experience with SpyGlass! Where is it good? Where is it bad?

Is it really needed? Till now, I did my designs without SpyGlass... Why should I now start using it?

When it's must? When nice to have? When unnecessary?

Thank you!

 

[mail4idle2]

SPYGLASS is good.
Really needed depending on the complexity of design. You can catch Gate level simulation issues at RTL stage it self. It will reduce ECO cycle.
If you have a single clock domain you may not need. but once you have multiple clocks then for Clock Domain Crossing run is Required

 

[ivlsi]

You can catch Gate level simulation issues at RTL stage

Could you please elaborate what exactly issues could it catch?

What checks related to Clock Domain Crossing could it do?

What tools (Simulators/Synthesis/DFT/etc) could it be ported to?

 

[mail4idle2]

I am talking basically on RTL level checks. They have nothing to do with other tools.

 

[ivlsi]

How should requirements / constraints be developed for SpyGlass? What language? WHo should define the rules of checks? Where should they be taken from?

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How do Cross Domain checks are performed? What's the design checked for?

Who should define DFT rules? What exactly does SpyGlass check in terms of DFT?

 

[mail4idle2]

For all these you need to refer to SPYGLASS Documentation.