a991852
Newbie level 5
Hi All,
I'm trying to implement a split capacitor array DAC, which is shown in this following picture:
The problem is that the scaling capacitor is not a unit sized capacitor, which cannot be placed inside the capacitor array.
My Idea for the solution is that:
If the scaling capacitor is 1.125C, then I'll put the 1C inside the capacitor array layout, and an external 0.125C. Hence I would get good matching for the 1C which is drawn with other unit sized capacitor, and the 0.125C even though with bad matching, 10% of 0.125C would not affect my circuit.
Does this idea seem applicable or is there another way?
I'm trying to implement a split capacitor array DAC, which is shown in this following picture:
The problem is that the scaling capacitor is not a unit sized capacitor, which cannot be placed inside the capacitor array.
My Idea for the solution is that:
If the scaling capacitor is 1.125C, then I'll put the 1C inside the capacitor array layout, and an external 0.125C. Hence I would get good matching for the 1C which is drawn with other unit sized capacitor, and the 0.125C even though with bad matching, 10% of 0.125C would not affect my circuit.
Does this idea seem applicable or is there another way?