[SOLVED] SPI EEPROM not always returning back what was transmitted. MSP432 25LC040

#include "msp.h"
#include <stdint.h>

volatile uint8_t RXData = 0;
volatile uint8_t TXData;

int main(void)
{
    volatile uint32_t i;

    WDT_A->CTL = WDT_A_CTL_PW |             // Stop watchdog timer
            WDT_A_CTL_HOLD;

    P1->OUT &= ~BIT0;
    P1->DIR |= BIT0;                        // Configure P1.0 LED as output

    P1->SEL0 |= BIT4 | BIT5 | BIT6 | BIT7;  // set 4-SPI pin as second function

    EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put state machine in reset

    // For our slave device, data goes out on falling edge and latched on the rising edge
    // Data present on SI pinn are latched on rising edge of clock input,
    // While data on the SO pin is updated after the falling edge of the clock input.

    EUSCI_B0->CTLW0 = EUSCI_B_CTLW0_SWRST | // Remain in reset state
            EUSCI_B_CTLW0_MST |             // SPI master
            EUSCI_B_CTLW0_SYNC |            // Synchronous mode
            //EUSCI_B_CTLW0_CKPH |
            //EUSCI_B_CTLW0_CKPL |            // Clock polarity high
            EUSCI_B_CTLW0_MSB |             // MSB first
            EUSCI_B_CTLW0_MODE_1 |          // 4-pin mode
            EUSCI_B_CTLW0_STEM |            // STE mode select
            EUSCI_B_CTLW0_SSEL__ACLK;       // ACLK

    EUSCI_B0->BRW = 1;                   // /2,fBitClock = fBRCLK/(UCBRx+1).
    EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// **Initialize USCI state machine**
    TXData = 0x01;                          // Holds TX data

    // Enable eUSCIA3 interrupt in NVIC module
    NVIC->ISER[0] = 1 << ((EUSCIB0_IRQn) & 31);

    while(1)
    {
        EUSCI_B0->IFG |= EUSCI_B_IFG_TXIFG; // Clear TXIFG flag
        EUSCI_B0->IE |= EUSCI_B__TXIE;      // Enable TX interrupt

        for (i = 1000; i > 0; i--);          // Delay before next transmission
        TXData++;                            // Increment transmit data
    }
}

// SPI interrupt service routine
void EUSCIB0_IRQHandler(void)
{
    if (EUSCI_B0->IFG & EUSCI_B_IFG_TXIFG)  // data from txbuffer has moved to tx shift register
    {
        // Transmit characters
        EUSCI_B0->TXBUF = TXData;   // writing to txbuffer activates spi clock

        // Disable tx interrupt
        EUSCI_B0->IE &= ~EUSCI_B__TXIE;

        // Wait till a character is received
        while (!(EUSCI_B0->IFG & EUSCI_B_IFG_RXIFG));


        // Move data to a temporary buffer
        RXData = EUSCI_B0->RXBUF;

        if(RXData != 0x00){     // for debugging
            __no_operation();
            __no_operation();
        }
        // Clear the receive interrupt flag
        EUSCI_B0->IFG &= ~EUSCI_B_IFG_RXIFG;
    }
}

// Implement SPI using polling method

#include "msp.h"
#include <stdint.h>

// EEPROM Instructions
#define READ    0x03
#define WRITE   0x02
#define WRDI    0x04
#define WREN    0x06
#define RDSR    0x05
#define WRSR    0x01

uint8_t SPI_transfer(uint8_t data);
void wait_busy(void);
void read_EEPROM(uint8_t address);
void write_EEPROM(uint8_t address);

uint8_t RDxBuffer = 0;

int main(void)
{
    volatile uint32_t i;

    WDT_A->CTL = WDT_A_CTL_PW |             // Stop watchdog timer
                 WDT_A_CTL_HOLD;

    P1->SEL0 |= BIT4 | BIT5 | BIT6 | BIT7;  // set 4-SPI pin as second function

    P8->DIR |= BIT7;    // CS Pin GPIO
    P8->OUT |= BIT7;

    EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put state machine in reset

    EUSCI_B0->CTLW0 = EUSCI_B_CTLW0_SWRST | // Remain in reset state
                        EUSCI_B_CTLW0_MST | // SPI master
                       EUSCI_B_CTLW0_SYNC | // Synchronous mode
                        EUSCI_B_CTLW0_MSB | // MSB first
                     EUSCI_B_CTLW0_MODE_1 | // 4-pin mode
                       EUSCI_B_CTLW0_STEM | // STE mode select
                  EUSCI_B_CTLW0_SSEL__ACLK; // ACLK

    EUSCI_B0->BRW = 1;  //2,fBitClock = fBRCLK/(UCBRx+1).
    EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;// **Initialize USCI state machine**


    while(1)
    {
        read_EEPROM(0);
        write_EEPROM(0);
    }
}

uint8_t SPI_transfer(uint8_t data){

    // begin transmission
    EUSCI_B0->TXBUF = data;

    // wait while eUSCI_B is busy
    while(EUSCI_B0->STATW & EUSCI_B_STATW_SPI_BUSY){}

    // read recieved value
    return EUSCI_B0->RXBUF;
}

void wait_busy(void){

    char status = 0;

    do{
        P8->OUT &= ~BIT7;    // CS select

        SPI_transfer(RDSR);
        status = SPI_transfer(0);

        P8->OUT |= BIT7;     // CS release
    } while(status == 1);

}

void read_EEPROM(uint8_t address){

    wait_busy();
    P8->OUT &= ~BIT7;   // CS select
    SPI_transfer(READ);
    SPI_transfer(address);
    RDxBuffer = SPI_transfer(0);
    P8->OUT |= BIT7;    // CS release
}

void write_EEPROM(uint8_t address){

    wait_busy();

    // Protect Release
    P8->OUT &= ~BIT7;   // CS select
    SPI_transfer(WRSR);
    SPI_transfer(0x02);
    P8->OUT |= BIT7;    // CS release

    // Write Enable
    P8->OUT &= ~BIT7;   // CS select
    SPI_transfer(WREN);
    P8->OUT |= BIT7;    // CS release

    // Write
    P8->OUT &= ~BIT7;   // CS select
    SPI_transfer(WRITE);
    SPI_transfer(address);
    SPI_transfer(0xCD);
    P8->OUT |= BIT7;    // CS release

}