SPDT in LTspice questions

[Hawaslsh]

Hello all,

I am trying to create a SPDT switch in LT-spice. Naturally I went to google and found a decent solution, link here. I don't fully understand the how the spice directive defines the switch. Above is the recreation from the tutorial from the link which works as expected. The first line ".subckt..." defines the port names for the SPDT symbol. What/how do the next two lines "S1..." and "S2..." define the two switch states? in the third and fourth line; what is Vh and Vt?
Also, I tried expanding the above example for my purposes and ran into some unexpected results. Instead of two DC supplies feeding the SPDT, I have two filtered, and inverted PWM signals, see schematic below. When I run a transient analysis to see how driving those large capacitors will look, I get a very unexpected spike shortly into the simulation.

I delayed the switching for a ~1 sec (below) and plotted the inputs to the SPDT switch. With no switching the inputs to the SPDT looks as they should. The output of the SPDT lies on top of V2 and wasn't plotted to avoid confusion.

When the switching starts it seems the switch is causing serious resonance and yields in an error. The Bottom left shows the the full time and voltage scale before reaching the error. The plot on the bottom right is focused in on when the switching starts. Any idea why I am seeing these results?

Thanks in advance
Sami

 

[BradtheRad]

Many questions in one post.

You have a lot going on in your project. It's best to start out making simple circuits, to study how each component behaves. Charging capacitors, generating PWM, activating a SPDT, op amp behavior. Etc.

 

[FvM]

You find information about SPICE switch model and meaning of parameters in the LTspice help under LTspice/Circuit Elements/S. Voltage Controlled Switch.

Driving a large capacitance by an OP buffer is a basically a bad idea because it brings up stability problems, switching the load on and off is even worse. The simulator problems can be probably overcome by tuning SPICE parameters in the control panel, but it's an advanced topic, not suggested for SPICE tentative steps.

I don't see what you want to achieve with this circuit.If it serves a useful purpose, we should be able to find a better implementation.

--- Updated Nov 8, 2020 ---

The most comprehensive support for LTspice can be obtained here https://groups.io/g/LTspice

 

[Hawaslsh]

If it serves a useful purpose, we should be able to find a better implementation.

I simply want to drive or modulate (between -1.5 and -0.7V) the gate bias to some pHMETS at 100 Hz, see below.

I choose to do it this way for a few reasons:
1) filtered PWMs are usually a good way to produce DC outputs from a micro? But in this case I need a negative voltage.
2) The pwm frequency is ~450 HZ, in turn the inverting filter's time constant is pretty long. So i used a switch and 2 separate PWM lines to create a modulated signal with sharper edges rather than replying on 1 signal and changing the PWM % to create the modulation.
3) The caps exist as a load because the datasheet for the pHEMT suggests them. For this purpose I believe I can remove them, at least the 4.7uF, because my modulation is pretty slow.

If there is a better way to do this, I am open to change.
Thanks,
Sami

 

[FvM]

Place series resistors 50 to 100 ohms between OP outputs and switch, the load capacitor can be selected according to the intended edge rise time.