Some Help about Limiting Amplifier

hello!

can anyone tell me what's wrong with my schematic circuit?

I am currently simulating for my limiting amplifier gain but the result seems wrong.

How should I connect the input in testing gain for limiting amplifier?

Could you please take a screenshot with node voltages? For very low gain this simulation may work, but may not or not necesseraly a robust one.

kemiyun,

I simulated the limiting amplifier and this is the result, current source 3 has no current flowing through it. I don't know why.

Kemiyun,

About the gain of a fully differential amplifier. how should I get it? should I add up the two outputs, the vout+ and vout-?
thanks.

I'm sorry for the late answer.

I seem to lack the knowledge required to analyze the Limiting Amplifier deeply. I am sorry. But something is wrong about your simulation results. Your inputs are 120 mV and the sources of the input MOSFETs are -0.7 V (If your input must accept common mode range of 120 mV you might want to use the PMOS equivalent of this circuit.). If you have a DC voltage outside of your supply range, it's an unrealistic simulation caused by ideal elements. Also mA is really large current considering an analog IC be careful about your MOSFET sizes. By current source 3 do you mean M15 and M13?

To find the gain of a differential amplifier you may use the stb analysis or you can use a voltage buffer configuration and apply its input voltage values to another amplifier in open loop.

You may apply Vac 0.5 and -0.5 to both inputs and measure the Vout+ - Vout-. But somewhere in this forum this has already been discussed, taking the difference is the same as applying 1 Vac to one input and measuring its inverted output.

Hope this helps.