Re stacked devices - stacking for voltage division is
a common trick, especially in SOI. But this depends on
all of the stages acting in unison or the protection from
overvoltage will fail. Long routes can be a source of
transient imbalance and instability (particularly, the
"guard" devices need low AC-impedance gate drive to
not act quasi-inductive).
I do not like edge-fed fingers for anything that has
a lot of current. Prefer to drop down into the device
from above, multiple vias, to avoid debiasing and so on.
Particularly bad is when you bring S and D out the same
side.
Poly jumpers are very resistive in an unsilicided-poly
flow or where poly is selectively silicided and does
not hit the "field poly". You'd want to know what the
poly sheet resistance is, to know how concerned you
are. Poly can be handy, but it can also add significant
unmodeled delay to circuit branches.