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some ads problem about convergence substrate error

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Dummyeng

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i design an amplifier but its give me some error and warnings like
First this warning happen and i dont know why
Warning detected by hpeesofsim in Substrate model during netlist flattening.
Simulations referencing substrate `MSub1' will not include metal loss
because metal thickness is zero.
i think i give correct number
1.jpg
and second problem is that ads reject some number

Fwd sourceLevel=807.661e-03 80.77% 2/2 Step=121.9047619 rejected

Fwd sourceLevel=682.979e-03 68.30% 2/2 Step=58.04988662 rejected

and in the end it happnd

2.jpg


and
 

There is nothing with Substrate.It's a Convergence Problem coming from your Layout and/or Port Configuration.
 

    Dummyeng

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In your substrate block, you have defined metal thickness T=0 mil
 

    Dummyeng

    Points: 2
    Helpful Answer Positive Rating
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