Solution of GRC (Global Routing Congestion)

KlausST said:

Hi,

Please, before posting do an internet search on your own.
To all your recent posts I found good descriptions, explanations and answers on the first hits of an internet search ... within a couple of seconds.

Your questions are very general. Thus my recommendation:
Do the search, go through the documents. Then if there still are questions, please refer to the document (post a link) you are reading and ask a more detailed question.

Klaus

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seunghok said:

Since there are already general questions from other people on the thread, I just asked lightly to gain some insight into the problems I'm personally solving. I am sorry that I didn't know that the staff of this site would think like this because I uploaded the thread for the first time today. I'll post the thread again with a more detailed question.

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ads-ee said:

Your post appears to be more about PCB, ASIC, or FPGA. One of the posts appears to be dealing with placement and routing congestion. Your other question appears to be about clock distribution. Neither of these questions are appropriate for the Elementary Electronics section. The answer for dealing with or solving clock delay/latency and GRC are different depending on which forum the question should have been posted in.

You should not expect volunteers (we aren't paid to answer questions) to perform google searches for you and copy the results onto edaboard. Thi is not an effective method for getting timely answers. Usually doing this results in negative feedback until the question/answer cycle damps to 0 replies. The more detailed the question and the more effort you show in attempting to answer your question yourself will get more favorable responses.

A good resource on how one should endevor to ask a question can be found here

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