solution for large memory requirement for FPGA

Status
Not open for further replies.

win2010

Member level 1
Joined
Sep 30, 2010
Messages
35
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Visit site
Activity points
1,605
Hello,
I am designing "time interleaver" for DVB-T2, which is require large memory to be store before interleave.
Means, 32400 values in a one row and like that 1024 column of data need to be store before doing operation.

32400 rows, 1024 columns and each location of 17-bits wide.

32400 * 1024 * 17-bits = 564019200 bits need to be store....

What is the solution for this to be done.......?

I am using Spartan 3A-DSP........
 

Since the spartan-3 doesn't have enough memory for that, you'll have to use external DRAM.
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…