SoC functional verification

[xirix]

In a SoC with a standard bus connectivity (OCP), what is the appropriate method for functional testing?

 

[andromeda]

In SoC which use OCP as main on-chip bus:
- for block-level verification, you need OCP reusable verification component (eVC if you use Specman – you could buy it from Vericity or IP suppliers, or BFM in Verilog, VHDL or Vera) to build consistent verification environment for all sub-modules
- for top-level verification, if it is black-box it is not important which on-chip bus you use, if it is grey/white box, you need some OCP protocol checkers