SMPS transformer right above sensitive signal cctry?

cupoftea said:

Hi,

Power bricks get an effeciency boost with GaN

The design of an LLC resonant converter illustrates how eGaN FETs can shrink the physical size of modern supply circuitry. Alex Lidow, Efficient Power Conversion Corp. The rapid expansion of computing and telecommunications has brought a migration to a 48 V-based power architecture. Applications...

www.eeworldonline.com

...the above shows the Planar SMPS transformer right , smack bang , above the sensitive signal cctry.....so because of the cores "shielded construction"...this is perfectly fine?

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What are you referring to as "sensitive signal circuitry"? The PWM controllers? Sure, that should be workable, but not necessarily a practical design. They're likely just trying to get the highest power density number possible to impress engineers.

cupoftea said:

...Also, it syas that eGan FETs are good in LLC, due to low Cds, which means you need less dead time...but surely you usually need to add Cds anyway, to keep dv/dt of the switching node down...for good EMC?

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I think they're just referring to POL DC-DC converters, not offline converters. Not sure conducted EMC is even tested for that.

cupoftea said:

...Also, it says that eGAN is good up to 150 degc junction....but its well known that FETs (of any type) run above 110degC junction will wear out and go pop prematurely?

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This gets into very speculative territory, but from a pure physics standpoint GaN devices should function to far higher junction temperatures than Si transistors, easily over 400C for simple GaN device models. But the actual devices are a lot more than that, so the actual temperature limits are based more on their gate material, interconnects, packaging, etc. Good luck getting specific info from manufacturers even with an NDA.

EPC publishes massive amounts of test data, if you want to melt your brain reading that.

Anecdotally, I have had EPC devices get so hot that their solder joints are liquid for hours, but otherwise function normally (just don't shake the board).

GaN devices should function to far higher junction temperatures than Si transistors, easily over 400C for simple GaN device models.

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Thanks,
...Page 3 of the above, under "packaging", appears to say that unlike Si and SiC FETs, GaN does not need wire bonds in the FET chip to connect to the PCB with........and indeed, its the disconnection of this wire bond under expansion/contraction, that is the reason that Si should not go above 110degC, so yes, it does appear that GaN can be run at much higher temperartures than Si......though i am a bit surprised that they dont talk that point up...its a massive benefit......why keep schtum about it?......why the GaN marketeers are not getting their teeth into this?

it seems eGaN have some mechanical advantages which are enhanced by the copper thermodynamics and EM shielding.

"Sensitive to what?" is a question. If the inductor magnetic
path is closed then maybe nothing escapes to bother the
neighbors. Of course nothing is ever ideal, so bound your
demands.

the advent of low Z high speed digital control in 3v3, 2v5, 1v8 and 1v2 allows the control to be really close to power stages these days as the immunity is surprisingly very high even 1mm from the control uP or FPGA chip top surface ....

Thanks,, though i wonder what if standard PWM controllers are being used, and not the high speed digital controllers?