SMPS Schematics - need your help!

[semiconductor]

smps schematics

I'm implementing a SMPS project. I've already got the schemantics but it is splitted into some parts. This is the first one I uploaded here. I do not fully understand how it works.

It's for AC filter, rectifier and voltage doubler. If input is 110VAC, output Vdc = 300Vdc (As I understand).

It would be very kind of you if you could spend some time explain to me how this schematics works

Schematics is uploaded via this host (I can not attach this schematics within his server, I do not understand why?)
https://tinypic.com/hs50zr.jpg

 

[E-design]

smps scheatics

I am not going to go into a lengthy analysis, but just explain the basic operation. Once you see this you will be able to work out the details.

When the AC is low (up to 120VAC) , Q1 is fired and the diode arrangement works as a voltage doubler. If the AC voltage is high (220VAC), Q3 will prevent Q1 from turning on and you will have normal full wave rectification.

HINT: D6 is just a bi-directional switch controlled by Q1, to analyze you can replace it by a switch between 2&3

 

[semiconductor]

170vdc smps

Nice to hear response from you E_Design.

As you said, I found it one day ago. But I can not explain exactly what happen when input voltage is 110VAC. I mean, I can not give a reasonable explanation for this case!

It would be very kind of you if you could give me more detailed explanation.

Thank you in advance.
Semiconductor

 

[Gomez]

Ue/Ur16 = (R12||R13+R14||R15+R16)/R16 or

Ur16 = R16*Ue/(R12||R13+R14||R15+R16)

when Ur16 >= Ud10(20V) + UbeQ3(0,6V) then Q3 turns on and Q1 is turns off. Q2 turns off and then D4 turns off.

Gomez

 

[E-design]

You have to analyze it cycle by cycle with the path between 2 & 3 shorted. You will then see that the two caps each get charged (on alternate 1/2 cycles) to the peak voltage (170VDC), and because they are in series the total voltage over them will be roughly 340VDC

 

[artem]

I suppose that it should work for 110 V but just one issue must be clarified - R8 R7 C13 . These together with zener and R resistors control thyristor Q1 ON/OFF and selects what part of period is to be rectified.

If input votage is 110 V , Q1 will be more time opened for negative phase and less time for positive period . So voltage on C12 will be less than half of Vdc .

Of course, i keep right for mistake ))

 

[E-design]

The voltage over C11,12 should be within a couple of volts from each other. You can run a simple spice session to confirm this.