Small vs larger SMT ceramic capacitors and internal inductance?

[treez]

Hello,
We are doing a 65A, 1V5 SMPS using cascade of Vicor Power PRM48JH480T250A00 module and VTM48ET020T080A00 module. Vin=48V.
We are seeing 30mV of ripple at the output voltage of the VTM48’ module, and even if we increase the external output capacitance from 329uF to 2329uF the ripple stays pretty much at 30mV.
(As you’d expect, the ripple frequency is 3MHz, which is the switching frequency)
There is 310uF of output capacitance internal to the VTM48’ module.
So we conclude that we cannot appreciably reduce the output ripple voltage by increasing the output capacitance, because this ripple voltage is mainly caused by the 1 milliohm of internal resistance inside the VTM48’ module. (page 11 of VTM48’ datasheet shows this).
Therefore, we believe that we should only add some high frequency capacitance at the output of the VTM48’ module. As such we wish to use ceramic capacitance with low internal inductance.
Can you confirm that generally the lowest inductance ceramic capacitace is gotten by using the lower capacitance values and the larger case sizes?

PRM module datasheet:
http://www.vicorpower.com/documents/datasheets/PRM48BH480T200B00.pdf
VTM module datasheet:
http://cdn.vicorpower.com/documents/datasheets/VTM48E_020_080A00.pdf

 

[FvM]

Can you confirm that generally the lowest inductance ceramic capacitace is gotten by using the lower capacitance values and the larger case sizes?

Why? Increasing the case size will increase the series inductance proportionally. Better use multiple small capacitors, particularly reversed form factor (wide and short) low inductance capacitors.

 

[treez]

thanks, but i thought the "plates" were more crammed in and "concertina'd" in a smaller case, which makes for higher inductance.

 

[KlausST]

Hi,

even if we increase the external output capacitance from 329uF to 2329uF the ripple stays

As you’d expect, the ripple frequency is 3MHz

2000uF seem to be an electrolytic capacitor.
But electrolytic capacitores are not made for 3MHz, they are pretty useless at 3MHz.

Maybe you could add a series L and some good capacitors (ceramics?)

Without series L you need special, very fast capacitor of more than 250uF with less than 0.2mOhms ESR @ 3MHz to significantely reduce the ripple.

Klaus

 

[FvM]

No, standard MLCC have very low series inductance by design.

 

[treez]

2000uF seem to be an electrolytic capacitor.

thanks, though this is a 1v5 output, so it was several (twenty inparallel) 100uf, 6v3 SMT ceramics.

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Without series L you need special, very fast capacitor of more than 250uF with less than 0.2mOhms ESR @ 3MHz to significantely reduce the ripple.

Thanks, yes indeed that is what already exists inside the VTM48' power module.

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Maybe you could add a series L

We could if we had room.
Its a 65A output so the inductors tend to be large.

 

[D.A.(Tony)Stewart]

Pulse planar 72A < 0.5 mOhm 0.45uH choke may be too lossy.
https://datasheet.octopart.com/PA1294.450-Pulse-datasheet-8123148.pdf PA1294.450
20mm square.

This represents 100 Ohm reactance but 36mV loss. (2.5W) @72A

So it is better to use distributed ferrite beads and smaller distributed caps rather than a single bus.

 

[KlausST]

Hi,

..then I recommend to improve wiring/layout.

Power supply -> C -> C -> C -> C... -> output

Connect the capacitors in one line between power supply and load.
(A star connection where all three are all connected together is definitely worse. Every L and every ESR to and between the Cs will decrease the effect of the Cs. )
When you connect the C bank in series between power supply and load every L and ESR to and between the Cs will improve power supply ripple suppression.

Klaus

 

[mtwieg]

Hello,
We are seeing 30mV of ripple at the output voltage of the VTM48’ module, and even if we increase the external output capacitance from 329uF to 2329uF the ripple stays pretty much at 30mV.
(As you’d expect, the ripple frequency is 3MHz, which is the switching frequency)
There is 310uF of output capacitance internal to the VTM48’ module.

Then there's likely something wrong with your measurement. The ripple current should be divided among the output capacitance, so adding more must lower it. Or the capacitors or layout simply aren't suitable for 3MHz.

So we conclude that we cannot appreciably reduce the output ripple voltage by increasing the output capacitance, because this ripple voltage is mainly caused by the 1 milliohm of internal resistance inside the VTM48’ module. (page 11 of VTM48’ datasheet shows this).

Why would the internal resistance of the source increase the ripple on your filter?

Therefore, we believe that we should only add some high frequency capacitance at the output of the VTM48’ module. As such we wish to use ceramic capacitance with low internal inductance.
Can you confirm that generally the lowest inductance ceramic capacitace is gotten by using the lower capacitance values and the larger case sizes?

No, inductance is going to be dominated by the length of the package and the routing of the traces. Reversed form factor MLLCs (0306, 0508, 0612, etc) or X2Y packages are an option, but don't generally come in large values, so you would need a ton of them. A well-designed LC filter is more appropriate if layout ESL is the main problem.

 

[treez]

Thanks, so In general, Surely a 1206, 1nF ceramic SMT capacitor has less inductance than a 0603 1nF ceramic SMT capacitor?, because the smaller case size has to “concertina” the capacitor plates to fit them in the smaller package which means more inductance?

Why would the internal resistance of the source increase the ripple on your filter?

..top of page 11 of the attached VTM module datasheet shows the situation…the 1milliohm of output resistance is what causes most of the output ripple voltage….the internal 310uF capacitor takes most of the 3MHz ripple.

 

[schmitt trigger]

Treez;
I know you are a seasoned PSU designer, having seen many threads of yours here.

So it all goes without saying that, at 3 Mhz, the design of the PWB itself will have as much impact as the components themselves.
One thing that I learned -painfully- that one must have several via holes from each capacitor's pad to the ground plane below. I also like Klaus idea of multiple paralleled but aligned capacitors.

I assume that you are employing at least a 4 layer board, correct?

 

[treez]

yes its at least 4 layers.....also, the VTM48' module has 310uF of internal output capacitance with just 1.6 milliohms of ESR.

Another question about this is as follows......

We are trying to reduce the ripple voltage at the output of our Vicor VTM48’ power module as in the attached schematic (VTM48’ datasheet also datasheet attached).
We find that no matter how much higher than 4.7uF we make C1, the output ripple voltage at C1 does not appreciably reduce.
Also, even if C1 is zero Farads (no capacitor at all at C1), then the ripple voltage at C2 is approximately 25mV pkpk , and no matter how much capacitance you put at the C1 position, the Vout ripple voltage at the C2 capacitor stays at approximately 25mV pkpk.

So why do our competitors all place a few hundred microfarads at the C1 position?

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Also, do you agree that a 47uF 1210 capacitor will generally have more internal inductance than a 100n, 1210 capacitor?

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Ive just done a test, and having a 0603,4u7 output capacitor gives LESS output ripple voltage than a 47u,1206 output capacitor.
So as you know, it is the capacitors ESL that is the dominating factor, -not surprising when we see that the ripple current is 3MHz.
Anyway, is it generally true that lower ESL is obtained by using

1...less capacitance in a given package size
2...a smaller package size for whatever the capacitance is.

...is there any relationship between the ESL and the voltage rating of the cap?.....maybe higher voltage
rated caps are more concertina'd inside and so would have more ESL?

 

[Velkarn]

we analyze emi suppression behavior of mlcc and revealed that NP0 is better than X7R and Z5V, even with less value. did you try np0 vs x7r?
and what is your measuring setup? maybe its measuring issue?

 

[treez]

measuring setup is scope probe with "tail" removed and inserted into special scope probe tip attachment on pcb

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d'you think that generally speaking a 1206,4u7 cap would have less ESL than a 1206,47u capacitor, say?...

 

[FvM]

d'you think that generally speaking a 1206,4u7 cap would have less ESL than a 1206,47u capacitor

Unlikely, why? But 10x 1206,4u7 surely have lower total ESL.

 

[Velkarn]

d'you think that generally speaking a 1206,4u7 cap would have less ESL than a 1206,47u capacitor, say?...

maybe it depends on dielectric type of mlcc...

 

[Dan Mills]

My RF experience has tended to be that firstly physically smaller is better, and secondly that with good dielectrics the layout makes at least as much difference as the cap.

0402 is better then 0603 and both are better then 1206 dielectrics being equal (Big values will not help you here, the series ESL will quickly dominate as the caps get larger, think lots of 10nF and 100pF rather then a few 100uF).

I would second the note about reversed packages.

Vias can add a lethal amount of series L when playing this game, but really you want to raise the output impedance of the power modules at the switching frequency, this is what is killing you.

Two of three vias around the cap termination is better then one, and get them close to the termination.

Given your very stiff source, you really need to raise the impedance of the supply at 3MHz if you want any serious attenuation, even 100nH or so would help, I don't see that adding a shunt impedance is going to do much unless it is fairly heroic because the series arm has such a low value.

Get the power and ground planes close to minimise inductance, and make sure that what you are seeing is actually there....

Could it could be you are seeing ground bounce from the INPUT side of the regulator (Input cap to far from the switcher so input current pulses flow in the ground plane and appear as voltage across its impedance)?

Big power at modern core logic voltages is a PITA.

Regards, Dan.

 

[treez]

Unlikely, why? But 10x 1206,4u7 surely have lower total ESL.

we wish to know so we can pick the one with lower ESL.
is it generally true that eg 4u7,1206 has higher ESL than say 47u,1206?

 

[Dan Mills]

Don't use 1206 if ESL matters to you..... Smaller packages really are better.

Now at only 3MHz, if the ESL of a ceramic cap matters you are probably doing something very wrong (Or working on a really butch power amplifier), seriously, series L will help more then all this sweating about things unspecified in the datasheets (Remember that the spacing of the cap plates from the board planes forms a loop area in itself, and loop areas equals inductance).

If you are in a place where ESL matters then you want to be using something other then jellybean parts anyway, ATC make some cool RF stuff as do CDW, but you will hate the prices.

Now me, I would be talking to the switcher manufacturers FAE at this point, not trying to find zero ESL on a forum.

Regards, Dan.

 

[mtwieg]

Thanks, so In general, Surely a 1206, 1nF ceramic SMT capacitor has less inductance than a 0603 1nF ceramic SMT capacitor?, because the smaller case size has to “concertina” the capacitor plates to fit them in the smaller package which means more inductance?

Certainly not. Just look up the SRF of the two from a manufacturer. This is the reason you'll probably never find a 1206 capacitor in a broadband RF layout. What's the MPN of the capacitors you're using?

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We are trying to reduce the ripple voltage at the output of our Vicor VTM48’ power module as in the attached schematic (VTM48’ datasheet also datasheet attached).
We find that no matter how much higher than 4.7uF we make C1, the output ripple voltage at C1 does not appreciably reduce.
Also, even if C1 is zero Farads (no capacitor at all at C1), then the ripple voltage at C2 is approximately 25mV pkpk , and no matter how much capacitance you put at the C1 position, the Vout ripple voltage at the C2 capacitor stays at approximately 25mV pkpk.

So wait, where exactly are measuring ripple voltage? Is it across the VTM's internal Cout (C1), or is it across your external capacitors (C2)? If there's significant inductance between the two, then adding C2 likely won't decrease ripple at C1. But this has nothing to do with the internal resistance of the VTM.